Version 2.1.1
Bug
- [EMCL-233] - "0x6502 Supported drive modes" register is missing CSV and CST modes
Improvement
- [EMCL-236] - Change Motor parameters default values
- [EMCL-240] - Modify register "Available phases mask" - 0x2FF0 / 0x2E
- [EMCL-264] - SinCos multiplier factor can be modified
- [EMCL-270] - Remove user polarity from "UART Enable GPO" feature
- [EMCL-294] - Set the Sync1 as synchronization signal instead of latch signal